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Theses:
Yudong Tan, "Cache Design and Timing Analysis for Preemptive Multi-tasking Real-Time Uniprocessor Systems," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Spring 2005. Presentation (pdf)
Jaehwan Lee, "Hardware/Software Deadlock Avoidance for Multiprocessor Multiresource System-on-a-Chip," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Fall 2004. Presentation (pdf)
Kyeong Keol Ryu, "Automated Bus Generation for Multiprocessor SoC Design," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Summer 2004. Presentation (pdf)
Tankut Akgul, "Assembly Instruction Level Reverse Execution for Debugging," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Spring 2004. Presentation (pdf)
Pramote Kuacharoen, "Embedded Software Streaming via Block Streaming," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Spring 2004. Presentation (pdf)
Bilge E. S. Akgul, "The System-on-a-Chip Lock Cache," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Spring 2004. Presentation (pdf)
Eung Seo Shin, "Automated Generation of Round-robin Arbitration and Crossbar Switch Logic," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Fall 2003. Presentation (pdf)
Mohamed A Shalan, "Dynamic Memory Management for Embedded Real-Time Multiprocessor System-on-a-Chip," Ph.D. dissertation, Georgia Institute of Technology, Atlanta, Fall 2003. Presentation (pdf)
Journals/Book Chapters:
P. Kuacharoen, V. Mooney and V. Madisetti, "Stream-Enabled File I/O for Embedded Systems," KMITL Science Journal, Special issue International Symposium on Mathematical, Statistical and Computer Sciences, 5(1), pp. 62-75, February 2005.
K. K. Ryu and V. J. Mooney, "Automated bus generation for multiprocessor SoC design," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 23(11), pp. 1531-1549, November 2004.
T. Akgul, V. J. Mooney III, "Assembly Instruction Level Reverse Execution for Debugging," ACM Transactions on Software Engineering and Methodology (TOSEM), 13(2), pp. 149-198, April 2004.
V. J. Mooney III, "Hardware/Software Partitioning of Operating Systems," in the book Embedded Software for SoC, edited by Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest and Norbert Wehn, published by Kluwer Academic Publishers, Boston, MA, U.S.A, pp. 187-206, September 2003.
P. Kuacharoen, V. J. Mooney III and V. Madisetti, "Software Streaming via Block Streaming," in the book Embedded Software for SoC, edited by Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest and Norbert Wehn, published by Kluwer Academic Publishers, Boston, MA, U.S.A, pp. 435-448, September 2003.
V. J. Mooney and D. M. Blough, "A Hardware-Software Real-Time Operating System Framework for SOCs," IEEE Design and Test of Computers, pp. 44-51, November-December 2002.
B. E. S. Akgul and V. J. Mooney, "The System-on-a-Chip Lock Cache," International Journal of Design Automation for Embedded Systems, 7(1-2), pp. 139-174, September 2002.
Conference / Workshop Proceedings
Y. Tan and V. Mooney, "WCRT Analysis for a Uniprocessor with a Unified Prioritized Cache," Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES'05), pp.175-182, June 2005. Presentation (pdf)
J. Lee and V. Mooney, "A novel O(n) Parallel Banker's Algorithm for System-on-a-Chip," Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC'05), pp.1304-1308, January 2005. Poster (pdf)
J. Lee and V. Mooney, "A Novel Deadlock Avoidance Algorithm and Its Hardware Implementation," Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS'04), pp.200-205, September 2004. Presentation (pdf)
Y. Tan and V. Mooney, "Integrated Intra- and Inter-Task Cache Analysis for Preemptive Multi-tasking Real-Time Systems," Proceedings of 8th International Workshop on Software and Compilers for Embedded Systems (SCOPES'04), pp.182-199, September 2004. Presentation (pdf)
K. Ryu, A. Talpasanu, V. Mooney and J. Davis, "Interconnect Delay Aware RTL Verilog Bus Architecture Generation for an SoC," Proceedings of the IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC'04), pp.176-179, August 2004. Presentation (pdf)
Y. Tan and V. Mooney, "Timing Analysis for Preemptive Multi-Tasking Real-Time Systems with Caches," Proceedings of the Design, Automation and Test in Europe Conference (DATE'04), pp.1034-1039, February 2004. Presentation (pdf)
B. Akgul, V. Mooney, H. Thane and P. Kuacharoen, "Hardware Support for Priority Inheritance," Proceedings of the IEEE Real-Time Systems Symposium (RTSS'03), pp.246-254, December 2003. Presentation (pdf)
P. Kuacharoen, M. Shalan and V. Mooney, "A Configurable Hardware Scheduler for Real-Time Systems," Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'03), pp.96-101, June 2003. Presentation (pdf)
Y. Tan and V. Mooney, "A Prioritized Cache for Multi-tasking Real-Time Systems," Proceedings of the 11th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI'03), pp. 168-175, April 2003. Presentation (pdf)
M. Shalan, E. Shin and V. Mooney, "DX-Gt: Memory Management and Crossbar Switch Generator for Multiprocessor System-on-a-Chip," Proceedings of the 11th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI'03), pp. 357-364, April 2003. Presentation (pdf)
K. Ryu and V. Mooney,"Automated Bus Generation for Multiprocessor SoC Design," Proceedings of the Design Automation and Test in Europe (DATE'03), pp. 282-287, March 2003. Presentation (pdf)
V. Mooney,"Hardware/Software Partitioning of Operating Systems," Proceedings of the Design Automation and Test in Europe (DATE'03), pp. 338-339, March 2003. Presentation (pdf)
P. Kuacharoen, V. Mooney and V. Madisetti,"Software Streaming via Block Streaming," Proceedings of the Design Automation and Test in Europe (DATE'03), pp. 912-917, March 2003. Presentation (pdf)
B. E. S. Akgul and V. Mooney,"PARLAK: Parametrized Lock Cache Generator," Proceedings of the Design Automation and Test in Europe (DATE'03), pp. 1138-1139, March 2003. Presentation (pdf)
J. Lee, V. Mooney, A. Daleby, K. Ingstrom, T. Klevin and L. Lindh,"A Comparison of the RTU Hardware RTOS with a Hardware/Software RTOS," Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC'03), pp. 683-688, January 2003. Presentation (pdf)
T. Akgul and V. J. Mooney,"Instruction-level Reverse Execution for Debugging," Proceedings of the Workshop on Program Analysis for Software Tools and Engineering (PASTE'02), pp. 18-25, November 2002. Presentation (pdf)
E. S. Shin, V. Mooney and G. F. Riley,"Round-robin Arbiter Design and Generation," Proceedings of the International Symposium on System Synthesis (ISSS'02), pp. 243-248, October 2002. Presentation (pdf)
J. Lee, K. Ryu and V. Mooney, "A Framework for Automatic Generation of Configuration Files for a Custom Hardware/Software RTOS," Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'02), pp. 31-37, June 2002. Presentation (pdf)
M. Shalan and V. Mooney, "Hardware Support for Real-Time Embedded Multiprocessor System-on-a-Chip Memory Management," Proceedings of the Tenth International Symposium on Hardware/Software Codesign (CODES'02), pp. 79-84, May 2002. Presentation (pdf)
B. E. Saglam (Akgul), J. Lee and V. Mooney, "A System-on-a-Chip Lock Cache with Task Preemption Support," Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES'01), pp. 149-157, November 2001. Presentation (pdf)
T. Akgul, P. Kuacharoen, V. Mooney and V. Madisetti, "A Debugger RTOS for Embedded Systems," Proceedings of the 27th EUROMICRO Conference (EUROMICRO'01), pp. 264-269, September 2001. Presentation (pdf)
P. Kuacharoen, T. Akgul, V. Mooney and V. Madisetti, "Adaptability, Extensibility, and Flexibility in Real-Time Operating Systems," Proceedings of the EUROMICRO Symposium on Digital Systems Design (EUROMICRO'01), pp. 400-405, September 2001. Presentation (pdf)
K. Ryu, E. Shin and V. Mooney, "A Comparison of Five Different Multiprocessor SoC Bus Architectures," Proceedings of the EUROMICRO Symposium on Digital Systems Design (EUROMICRO'01), pp. 202-209, September 2001. Presentation (pdf)
P. Shiu, Y. Tan and V. Mooney, "A Novel Parallel Deadlock Detection Algorithm and Architecture," 9th International Workshop on Hardware/Software Co-Design (CODES'01), pp. 30-36, April 2001. Presentation (pdf)
B. E. Saglam (Akgul) and V. Mooney, "System-on-a-Chip Processor Synchronization Support in Hardware," Design Automation and Test in Europe (DATE'01), pp. 633-639, March 2001. Presentation (pdf)
M. Shalan and V. Mooney, "A Dynamic Memory Management Unit for Embedded Real-Time System-on-a-Chip," International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES'00), pp. 180-186, November 2000. Presentation (pdf)
V. Mooney, "Path-Based Edge Activation for Dynamic Run-Time Scheduling," International Symposium on System Synthesis (ISSS'99), pp. 30-36, November 1999. Presentation (pdf)
Technical Reports:
Y. Tan and V.Mooney, "Cache-Related Timing Analysis for Multi-tasking Real-Time Systems with Nested Preemptions," Technical Report GIT-CC-04-11, Georgia Institute of Technology, 2004.
Y. Tan and V. Mooney, "Timing Analysis for Preemptive Multi-tasking Real-Time Systems with Caches," Technical Report GIT-CC-04-02, Georgia Institute of Technology, February 2004.
J. Lee and V. Mooney, "An O(min(m,n)) Parallel Deadlock Detection Algorithm," Technical Report GIT-CC-03-41, Georgia Institute of Technology, September 2003.
K Ryu and V. Mooney, "Automated Bus Generation for Multiprocessor SoC Design," Technical Report GIT-CC-02-64, Georgia Institute of Technology, December 2002.
T. Akgul and V. J. Mooney, "Instruction-level Reverse Execution for Debugging," Technical Report GIT-CC-02-49, Georgia Institute of Technology, September 2002.
E. S. Shin, V. Mooney and G. F. Riley, "Round-robin Arbiter Design and Generation," Technical Report GIT-CC-02-38, Georgia Institute of Technology, July 2002.
D. Sun, D. Blough and V. Mooney, "Atalanta: A New Multiprocessor RTOS Kernel for System-on-a-Chip Applications," Technical Report GIT-CC-02-19, Georgia Institute of Technology, April 2002.
Last Update : May 2005