ECE 3170 A & LA - Lab 1
DE-10 Tutorial: Verifying DES in C/C++ and VHDL

Due Date: Tuesday, September 15, 2026, 11:55 pm

Lab TA: Arman Allahverdi, aallahverdi3@gatech.edu

DE-10 Board Pickup Times (Klaus 2363):

Lab Help Sessions (Klaus 2363):

  • PDF writeup of Lab 1
  • VHDL and C code for Lab 1
  • Tips for use of GenAI tools (ex: Google Gemini) for Lab 1:
  • - Useful for generating test inputs.
  • - Useful for generating boilerplate code (e.g., filling in the testbench, generating port maps for the testbench).
  • - Useful for troubleshooting common error messages.
  • NOTE: this is the first semester with limited use of AI tools allowed. Please explain in your lab report any use you make of AI in solving Lab 1. The goal is to increase learning in a transparent and productive manner.

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    Common issues / Lab updates

    The DE-10 Standard board has a "kill-switch", which is the big red button next to the power plug. This needs to be in the "down" position for the board to have power.

    When setting up the USB-Blaster driver (step 13 of the prelab steps), you may see either USB-Blaster or EthernetBlaster. After adding the device, as long as the hardware for selection is now shown as "DE-SoC" then it should function correctly.

    A Few Words

    Quartus and ModelSim are installed on the computers in Klaus 1446. If you have trouble getting the programs to work on your own machine you can utilize these, however after an update to Windows 10, newer versions of Quartus are used and these machines are updated on a per-semester basis. For these machines, open the Quartus Prime application (whichever version is installed) and continue with the lab as described in the document. One difference when using Klaus 1446 computers is that for simulations, in the EDA Tool Settings window. Instead of choosing ModelSim-Altera in the Simulation/Tool Name box, choose Questa Intel FPGA. Then, continue as normal.

    Questions always come up so please plan to make ample and early use of TA office hours!