Hardware/Software RTOS:

Traditionally, designers make hardware and software partitioning decisions at an early stage in the design, with the development of each part independent from there on. Hardware-software codesign provides a more flexible design process, with tradeoffs and feedback between the two being made throughout. Thus the result is a design improved in many areas -- performance, programmability, area, maintenance, reliability, etc. Hardware-software codesign has the potential to make high-level synthesis much more widely used by providing for rapid prototyping. For example,instead of synthesizing down just to an ASIC, one could synthesize down to ASIC-microprocessor combinations.The timing critical parts would be partitioned to the hardware (say, an FPGA) with the rest in software. With the low price of many microprocessors, areas such as embedded system design would benefit greatly from automated tools for designing systems of interacting hardware and software.

This research is funded by NSF under INT-9973120, CCR-9984808 and CCR-0082164. We acknowledge donations received from Denali, Hewlett-Packard, Intel, LEDA, Mentor Graphics, Sun, Cadence and Synopsys.

Hardware-Software RTOS Publications

FACULTY:

Professor Vincent Mooney

Professor Douglas Blough

 

STUDENTS:

 

Tankut Akgul

Bilge Ebru Saglam Akgul

Sun Dishi

Pramote Kuacharoen

Jaehwan Lee

Jessica Lorraine Lunney

Kyeong Keol Ryu

Mohamed Shalan

Eung Shin

Yudong Tan

 

RELATED LINKS :

DAC'03 University Booth Session

DAC'02 University Booth Session

Pdf of DAC University Booth Poster

Hardware-Software Codesign mailing list ( The old postings are very interesting )

Hardware/Software Codesign approaches