Signature Based Hardware Security:

Recent chip manufacturing technology provides billions of transistors at device sizes so small that hardware alterations in the fabrication process cannot be detected if small enough (e.g., a few gates). As such, hardware attacks may pass traditional digital systems test (e.g., built-in self test) yet corrupt critical functionality resulting in dramatic harm. This nascent research project aims to invent an approach based on hardware signatures where malicious hardware alterations to chip functionality are detected prior to any negative impact on the system. For example, a signature can be added in the analog to digital conversion of a sensor's inputs and passed on to the analysis, processing and encryption chip; the signature can thus be checked to detect any nefarious alterations to functionality, including hardware attacks on input bits.

 

Faculty:

Professor Vincent Mooney

Professor David Keezer

 

Students:

Taimour Wehbe

 

Publications:


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Conference / Workshop Proceedings

T. Wehbe, V. Mooney, D. Keezer and N. Parham "A Novel Approach to Detect Hardware Trojan Attacks on Primary Data Inputs," Proceedings of the 2015 ACM Workshop on Embedded Systems Security (WESS'15), Article 2, 10 pages, October 2015. Presentation (pdf)

A. Gbade-Alabi, D. Keezer, V. Mooney, A. Poshmann, M. Stöttinger and K. Divekar "A Signature Based Architecture for Trojan Detection," Proceedings of the 2014 ACM Workshop on Embedded Systems Security (WESS'14), October 2014. Presentation (pdf)

 

Technical Reports:

V. Mooney, K. Palem and R. Wunderlich, "Loss-Tolerant and Secure Embedded Computing via Inscrutable Instruction-Set Architectures (I2SA)," Technical Report GIT-CC-04-12, Georgia Institute of Technology, 2004.

 

Related Links:

VIP Secure Hardware Team

Trust HUB