ECE 3170 A & LA - Lab 2
Verifying RSA in VHDL

Due Date: Friday, September 25th, 2026, 11:55 pm

Lab TA: Arman Allahverdi, aallahverdi3@gatech.edu

Lab help sessions (Klaus 2363):

  • PDF writeup of Lab 2
  • VHDL code for Lab 2
  • Tips for use of GenAI tools (ex: Google Gemini) for Lab 2:
  • - Useful for generating test inputs.
  • - Useful for generating boilerplate code (e.g., C and VHDL file I/O routines).
  • - Useful for troubleshooting common error messages.
  • NOTE: this is the first semester with limited use of AI tools allowed. Please explain in your lab report any use you make of AI in solving Lab 1. The goal is to increase learning in a transparent and productive manner.

     

     

    Common issues / Lab updates

    The DE-10 Standard board has a "kill-switch", which is the big red button next to the power plug. This needs to be in the "down" position for the board to have power.

    A Few Words

    Quartus and ModelSim are installed on the Windows computers in Klaus 1446. If you have trouble getting the programs to work on your own machine you can utilize these, however after an update to Windows 11, Quartus is now at version 25.1. For these machines, open the Quartus 25.1 application and continue with the lab as described in the document. The one difference is when creating a new project, in the EDA Tool Settings window. Instead of choosing ModelSim-Altera in the Simulation/Tool Name box, choose Questa Intel FPGA. Then, continue as normal.

    Questions always come up so please plan to make ample and early use of TA office hours!